Known methods for fabricating index-guided and gain-guided laser diode chips are described for example in DE 101 47 791. With the lithography technique (contact printing) which is proposed and available there, it is possible to obtain laser diodes with waveguide widths <2 μm only with a high technical effort. During the opening of a 0.5 μm wide window in the SiO2 passivation, shunts increasingly occur in the case of small waveguide widths, said shunts arising as a result of alignment tolerances (0.5 μm) and run-out effects (up to 2 μm offset over a 2 in. wafer).
In the case of the RiS method (Ridge by Selective regrowth) disclosed for example by Kuramoto et al., Jpn. J. Appl. Phys., Vol. 40 (2001), pp. L925–927, Part 2, No. 9A/B; Kimura et al., Mat. Res. Soc. Symp. Proc. Vol. 693 (2002) and Kuramoto et al., phys. stat. sol. (a) 192, No. 2, 329–334 (2002), the epitaxy is interrupted after the growth of an upper waveguide. In a dielectric intermediate layer (e.g. SiO2) subsequently deposited above that, strip-type windows are opened (patterning by means of photolithography and etching). In the second epitaxy step, the cladding layer of the waveguide and the contact layer grow in the window strips. This method requires a plurality of epitaxy steps. A variation of the index guidance, which can be achieved in the case of a ridge waveguide laser by changing the etching depth, is difficult.
A method for fabricating “InGaN Inner Stripe Laser Diodes”, which method is similar to the RiS method described above, is described in Nunoue et al., Jpn. J. Appl. Phys., Vol. 37 (1998), pp. 1470–1473, Part 1, No. 3B.
The group of optoelectronic chips based on nitride-III-V-compound semiconductor material in the present case includes, in particular, those chips in which a semiconductor layer fabricated epitaxially, which generally comprises a layer sequence made of different individual layers, contains at least one individual layer which has a material from the nitride-III-V-compound semiconductor material system InxAlyG1-x-yN where 0≦x≦1, 0≦y≦1 and x+y≦1. The semiconductor layer may have, by way of example, a conventional pn junction, a double heterostructure, a single quantum well structure (SQW structure) or a multiple quantum well structure (MQW structure). Such layer sequences are known in principle to the person skilled in the art and, therefore, are not explained in any further detail at this point. They are described for example in Nunoue et al., Jpn. J. Appl. Phys., Vol. 37 (1998), pp. 1470–1473, Part 1, No. 3B; Kuramoto et al., Jpn. J. Appl. Phys., Vol. 40 (2001, pp. L925–927, Part 2, No. 9A/B; Kimura et al., Mat. Res. Soc. Symp. Proc. Vol. 693 (2002); Kuramoto et al., phys. stat. sol. (a) 192, No. 2, 329–334 (2002); Tojyo et al., Jpn. J. Appl. Phys. 41, 1829 (2002) and Bulman et al., in Properties, Processing and Applications of Gallium Nitride and Related Semiconductors, 616, (1998) the disclosure contents of which is in this respect hereby incorporated by reference.